The present invention relates to the field of semiconductor devices and their manufacture. More specifically, in one embodiment the invention provides both bipolar and complementary metal-oxide (CMOS) semiconductor devices on a single substrate and a process for their fabrication.
Bipolar and CMOS devices and their fabrication have been well known for many years. Recently, the advantages of both types of devices have been beneficially incorporated into circuits using both types of devices on a single substrate. Circuits which incorporate both bipolar and CMOS devices have come to be known as "BiCMOS." BiCMOS devices offer the advantages of the high packing density and low power consumption of CMOS devices, as well as the high speed of bipolar devices. One BiCMOS device and process for fabrication thereof is described in U.S. Pat. No. 4,764,480 (Vora), assigned to the assignee of the present invention.
While meeting with some success, BiCMOS technology continues to have certain limitations. For example, well taps laterally spaced from the source and drain regions sometimes occupies surface area of the device. Because of the amount of space occupied by such well taps, the number of devices and circuitry which can be placed on a substrate is less than desired.
From the above it is seen that an improved BiCMOS structure and method of fabrication thereof is desired not only to provide devices with improved performance and reduced size, but also to provide a structure with increased area for placement of devices and circuitry.